NXP Semiconductors /LPC408x_7x /COMPARATOR /CTRL1

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Interpret as CTRL1

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DISABLED)CMP1_EN 0 (DISABLED)CMP1_OE 0 (CMP1_STAT)CMP1_STAT 0 (VREF_DIVIDER_1_)CMP1_VM 0 (RESERVED)RESERVED 0 (VREF_DIVIDER_0_)CMP1_VP 0 (RESERVED)RESERVED 0 (DIRECT)CMP1_SYNC 0 (HYSTERESISOFF)CMP1_HYS 0 (NOTINVERTED)CMP1_INTPOL 0 (EDGE)CMP1_INTTYPE 0 (FALLING)CMP1_INTEDGE 0 (NOTPENDING)CMP1_INTFLAG 0 (DISABLED)CMP1_VLADEN 0 (VREF_CMP_PIN_)CMP1_VLADREF 0 (RESERVED)RESERVED 0CMP1_VSel0 (RESERVED)RESERVED

CMP1_HYS=HYSTERESISOFF, CMP1_VLADEN=DISABLED, CMP1_INTEDGE=FALLING, CMP1_INTPOL=NOTINVERTED, CMP1_INTTYPE=EDGE, CMP1_VP=VREF_DIVIDER_0_, CMP1_OE=DISABLED, CMP1_INTFLAG=NOTPENDING, CMP1_SYNC=DIRECT, CMP1_EN=DISABLED, CMP1_VM=VREF_DIVIDER_1_, CMP1_VLADREF=VREF_CMP_PIN_

Description

Comparator 1 control register

Fields

CMP1_EN

Comparator 1 enable control.

0 (DISABLED): Comparator 1 disabled.

1 (DIS_DEEPSLP_PWRDWN): Comparator 1 is disabled in Deep Sleep and Power-down modes and re-enabled automatically when exiting those modes.

2 (DIS_PWRDWN): Comparator 1 is disabled in Power-down mode and re-enabled automatically when exiting Power-down.

3 (ENABLED): Comparator 1 is enabled.

CMP1_OE

Comparator 1 output enable.

0 (DISABLED): Comparator 1 output is disabled.

1 (ENABLED): Comparator 1 output is enabled.

CMP1_STAT

Comparator 1 status. This bit reflects the comparator 1 output, and is not affected by CMP1_OE.

CMP1_VM

Comparator 1 VM input select.

0 (VREF_DIVIDER_1_): Vref divider 1.

1 (CMP1_IN0): CMP1_IN[0].

2 (CMP1_IN1): CMP1_IN[1].

3 (CMP1_IN2): CMP1_IN[2].

4 (CMP1_IN3): CMP1_IN[3].

5 (CMP0_IN0): CMP0_IN[0].

6 (INTERNAL_0_9_V_BAND_): internal 0.9 V band gap reference.

7 (TEMPERATURE_SENSOR_): temperature sensor.

RESERVED

Reserved.

CMP1_VP

Comparator 1 VP input select.

0 (VREF_DIVIDER_0_): Vref divider 0.

1 (CMP1_IN0): CMP1_IN[0].

2 (CMP1_IN1): CMP1_IN[1].

3 (CMP1_IN2): CMP1_IN[2].

4 (CMP1_IN3): CMP1_IN[3].

5 (CMP0_IN0): CMP0_IN[0].

6 (INTERNAL_0_9_V_BAND_): internal 0.9 V band gap reference.

7 (TEMPERATURE_SENSOR_): temperature sensor.

RESERVED

Reserved.

CMP1_SYNC

Comparator 1 output synchronization control.

0 (DIRECT): The comparator 1 output is used directly.

1 (SYNCH): The comparator 1 output is synchronized with the internal bus clock for output to other peripherals.

CMP1_HYS

Comparator 1 hysteresis control. When enabled, hysteresis determines the difference required between the comparator inputs before the comparator output switches. The difference must be in the direction opposite of the current comparator output.

0 (HYSTERESISOFF): Hysteresis is turned off, comparator output will change as the input voltages cross.

1 (HYSTERESIS_EQ_5_MV_): Hysteresis = 5 mV.

2 (HYSTERESIS_EQ_10_MV_): Hysteresis = 10 mV.

3 (HYSTERESIS_EQ_15_MV_): Hysteresis = 15 mV.

CMP1_INTPOL

Selects the polarity of the CMP1 output for purposes of generating level interrupts. See Table 412.

0 (NOTINVERTED): The CMP1 output is used as-is for generating interrupts.

1 (INVERTED): The CMP1 output is used inverted for generating interrupts.

CMP1_INTTYPE

Select comparator 1 interrupt type. See Table 412.

0 (EDGE): Comparator 1 interrupt is edge triggered.

1 (LEVEL): Comparator 1 interrupt is level triggered.

CMP1_INTEDGE

Select edge triggered interrupt to be active on either high or low transitions, when CMP1_IntType = 0. See Table 412.

0 (FALLING): Comparator 1 interrupt is active on falling edges.

1 (RISING): Comparator 1 interrupt is active on rising edges.

2 (DUALEDGE): Comparator 1 Interrupt is active on both edges.

3 (RESERVED_): reserved.

CMP1_INTFLAG

Comparator 1 interrupt flag.

0 (NOTPENDING): The Comparator 1 interrupt is not pending.

1 (PENDING): The Comparator 1 interrupt is pending. Writing a 1 to this bit clears the flag.

CMP1_VLADEN

Voltage ladder enable for comparator 1.

0 (DISABLED): The Comparator 1 voltage ladder is disabled.

1 (DIS_DEEPSLP_PWRDWN): The Comparator 1 voltage ladder is disabled in Deep Sleep and Power-down modes and re-enabled automatically when exiting those modes.

2 (DIS_PWRDWN): The Comparator 1 voltage ladder is disabled in Power-down mode and re-enabled automatically when exiting Power-down.

3 (ENABLED): The Comparator 1 voltage ladder is enabled.

CMP1_VLADREF

Voltage reference select for comparator 1 voltage ladder.

0 (VREF_CMP_PIN_): VREF_CMP pin.

1 (VDDA_PIN_): VDDA pin.

RESERVED

Reserved.

CMP1_VSel

Voltage ladder value for comparator 1. The reference voltage Vref depends on the setting of CMP1_VLADREF (either VDD(3V3) or voltage on pin VREF_CMP). 00000 = Vss. 00001 = 1 x Vref1 / 31. 00010 = 2 x Vref1 / 31. … 11111 = Vref1.

RESERVED

Reserved.

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